1. Field of the Invention
The present invention relates to a circuit arrangement for converting digital signals, in particular PCM signals, which in each case comprise a number of bits, into corresponding analog signals, employing a R-2R chain network.
2. Description of the Prior Art
A R-2R chain network of the type mentioned above can be constructed, for example as disclosed in the German allowed published application No. 23 15 986 corresponding to U.S. Pat. No. 3,906,489, such that all of its series resistors and its shunt resistors which are connected to the two ends of the network each have one and the same resistance value R, whereas all the other shunt resistors possess the double resistance value 2R. One end of the R-2R chain network forms the analog signal output. In order to convert digital signals, each comprising n+m+1 bits, into analog signals in accordance with a non-linear characteristic curve composed of 2.sup.m+1 linear sections each containing 2.sup.n amplitude stages, each connection point of a group of n adjacent connection points of a shunt resistor and at least one series resistor can be selectively supplied with a constant current from one of n constant current sources in accordance with the n lowest bit values of the relevant digital signal, in each case formed by a binary "1". The connection point of the group of n adjacent connection points which extend toward the analog signal output is spaced from the relevant end of the R-2R chain network by a distance corresponding to 1 to 2.sup.m-1 connection points, in accordance with the value of the m bits of the relevant digital signal, in each case formed by a binary "1". The adjacent connection point of a shunt resistor and at least one series resistor, considered in the direction toward the aforementioned end of the R-2R chain network is supplied with a constant current from a separate constant current source in the event that at least one of the m bits of the relevant digital signal is formed by a binary "1".
However, a R-2R chain network of this kind can also be constructed in that (see, for example, Elektronik 21 (1972) 2, 39, 40, FIG. 3; 1978 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, 186, 187, top of FIG. 2), all the series resistors have the resistance value R and all the shunt resistors have the resistance value 2R, wherein one end of the R-2R chain network forms the analog signal output and the other end of the R-2R chain network is terminated by an additional resistor having the resistance value 2R. In order to convert a digital signal, which comprises a number of bits corresponding to the number of shunt resistors, binary voltages corresponding to the bits of the digital signal can be connected to those ends of the shunt resistors which extend away from the series resistors. Here, the R-2R chain network can be constructed in accordance with the German published application No. 24 23 130 corresponding to U.S. Ser. No. 576,991, and French Pat. No. 20 43 946, such that the series resistors which have the resistance value R are formed by the source-drain paths of MOS transistors which are constantly in the conductive state, and the shunt resistors which have the resistance value 2R are formed by the source-drain paths of two MOS transistors or two pairs of MOS transistors of two groups of MOS transistors which are connected to voltage feed sources which are individual to each group and which emit different voltages, which MOS transistors can be alternatively brought into the conduction state from alternatively activated outputs of a control circuit which can be supplied at its input with one bit of the relevant digital signal, in that there control electrodes are operated with the same control potential which is carried by the control electrodes of the MOS transistors which form the series resistors. One of the two MOS transistors (or pairs of MOS transistors) which form the shunt resistors of the R-2R chain network, which are arranged at the end of the chain network facing away from the analog signal output, is connected in parallel with an additional MOS transistor (or pair of MOS transistors) which is constantly in the conductive state.
The accuracy of the digital/analog conversion in a R-2R chain network of this kind is independent not only upon the geometrical tolerances of the MOS transistors, but also to a large extent upon the influence of the particular control electrodes source voltage and control electrode drain voltage upon the resistance of the conductive MOS transistor. As a result the resistance values of the individual MOS transistors deviate relatively considerably in both directions from a theoretically standard resistance value R in dependence upon the bit combination of the particular digital signal, so that the digital/analog conversion can involve an error of up to 20%.
Finally, a R-2R chain network of this kind can be designed in accordance with Electronics 45 (1972) 12, 83, 87, 90, FIG. 5; 1978 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, 186, 187, bottom of (FIG. 2), such that, again, all the series resistors have the resistance value R and all of the shunt resistors have the resistance value 2R, wherein a consant current source is fed in at the point of connection between the shunt resistor connected to one end of the R-2R chain network and the adjacent series resistor, and the other end of the R-2R chain network is terminated by an additional resistor having the resistance value 2R. In order to convert a digital signal which comprises a number of bits corresponding to the number of shunt resistors, those ends of the shunt resistors which extend away from the series resistors can be directly connected, in accordance with the bits of the digital signal, to the base pole of the constant current source or to a sum current line which carries the same potential and which forms the analog signal output.